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HANBit
HMF8M32M8A
FLASH-ROM MODULE 32MByte (8M x 32Bit), 72-Pin SIMM, 5V Part No. HMF8M32M8A GENERAL DESCRIPTION
The HMF8M32M8A is a high-speed flash read only memory (FROM) module containing 16,777,216 words organized in a x32bit configuration. The module consists of eight 4M x 8bit FROM mounted on a 72-pin, double-sided, FR4-printed circuit board. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0V flash or EPROM devices. Eight chip enable inputs, (/CE_UU1, /CE_UM1, /CE_LM1, /CE_LL1, /CE_UU2, /CE_UM2, /CE_LM2, CE_LL2) are used to enable the module's 4 bytes independently. Outputs enable (/OE) and write enable (/WE) can set the memory input and output.When FROM module is disable condition the module is becoming power standby mode, system designer can get lowpower design. All module components may be powered from a single +5V DC power supply and all inputs and outputs are TTLcompatible.
FEATURES
w Part Identifications HMF8M32M8A : 32Mbyte, 72-pin SIMM, Gold PIN 1 wAccess time : 55, 70, 90 w High-density 32MByte design w High-reliability, low-power design w Single + 5V 0.5V power supply w Easy memory expansion w All inputs and outputs are TTL-compatible w FR4-PCB design w Low profile 72-pin SIMM w Minimum 100,000 write/erase cycle w Sectors erase architecture w Sector group protection w Temporary sector group unprotection w The used device is Am29F032B or M29F032D 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 -55 -70 -90 22 23 24
PIN ASSIGNMENT
SYMBOL Vss A3 A2 A1 A0 Vcc A11 /OE A10 /RESET /CE-LL2 /CE-LL1 DQ7 DQ0 DQ1 DQ2 DQ6 DQ5 DQ4 DQ3 /WE A17 A14 A13 PIN 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 SYMBOL A20 DQ8 DQ9 DQ10 /CE-LM2 Vcc /CE-LM1 DQ15 DQ14 DQ13 DQ12 DQ11 A18 A16 Vss A6 A21 A5 A4 Vcc /CE-UM2 /CE-UM1 DQ23 DQ16 PIN 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 SYMBOL DQ17 DQ18 DQ22 DQ21 DQ20 DQ19 A19 A15 A12 A7 Vcc A8 A9 DQ24 DQ25 DQ26 /CE-UU2 /CE-UU1 DQ31 DQ30 DQ29 DQ28 DQ27 Vss
OPTIONS
w Timing 55ns access 70ns access 90ns access w Packages
MARKING
72-PIN SIMM 72-pin SIMM M TOP VIEW
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FUNCTIONAL BLOCK DIAGRAM
DQ 0-DQ31 A0-A21 DQ32 A22
HMF8M32M8A
A0-21 DQ0-7 /WE /OE /CE /CE-LL1 A0-21 DQ8-15 /WE /OE /CE-LM1 A0-21 /WE /OE /CE-UM1 /CE DQ16-23 /CE /CE-LM2 /CE-LL2
A0-21 /WE /OE /CE DQ0-7
U1
U5
A0-21 /WE /OE /CE DQ8-15
U2
U6
A0-21 /WE /OE /CE-UM2 DQ 16-23
U3
U7
/CE
A0-21 /WE /OE /WE /OE /CE /CE-UU1 /CE-UU2 DQ24-31 /WE /OE
A0-21 /WE /OE /CE DQ 24-31
U4
U8
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TRUTH TABLE
MODE STANDBY NOT SELECTED READ WRITE or ERASE NOTE: X means don't care /OE X H L X /CE H L L L /WE X H H L DQ HIGH-Z HIGH-Z Q D
HMF8M32M8A
POWER STANDBY ACTIVE ACTIVE ACTIVE
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage with respect to ground all other pins Voltage with respect to ground Vcc Storage Temperature SYMBOL VIN,OUT VCC TSTG RATING -0.6V to + VCC +0.6V -0.60V to + 6.0V -65oC to + 125oC
Operating Temperature TA -40oC to + 85oC w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER Vcc for 10% device Supply Voltages Ground SYMBOL Vcc VSS MIN 4.5V 0 0 TYP. MAX 5.5V 0
DC AND OPERATING CHARACTERISTICS (0oC TA 70 oC ; Vcc = 5V 0.5V )
PARAMETER Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Vcc Active Current for Read(1) Vcc Active Current for Program /CE = VIL, /OE=VIH or Erase(2) Vcc Standby Current Low Vcc Lock-Out Voltage Notes: 1. The Icc current listed is typically less than 2mA/MHz, with /OE at VIH. 2. Icc active while embedded algorithm (program or erase) is in progress 3. Maximum Icc current specifications are tested with Vcc=Vcc max
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TEST CONDITIONS Vcc=Vcc max, VIN= GND to Vcc Vcc=Vcc max, VOUT= GND to Vcc IOH = -2.5mA, Vcc = Vcc min IOL = 12mA, Vcc =Vcc min /CE = VIL, /OE=VIH,
SYMBOL IL1 IL0 VOH VOL ICC1 ICC2 ICC3 VLKO
MIN
MAX 1.0 1.0
UNITS A A V
2.4 0.45 40 60 1.0 3.2 4.2
V mA mA mA V
/CE= VIH
3
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ERASE AND PROGRAMMING PERFORMANCE
LIMITS PARAMETER MIN. Sector Erase Time Chip Erase Time Byte Programming Time Chip Programming Time TYP. 1 64 7 28.8 300 86.4 MAX. 8 sec sec s sec UNIT
HMF8M32M8A
COMMENTS Excludes 00H programming prior to erasure Excludes system-level overhead
TSOP CAPACITANCE
PARAMETER SYMBOL CIN COUT CIN2 PARAMETER TEST SETUP DESCRIPTION Input Capacitance Output Capacitance Control Pin Capacitance VIN = 0 VOUT = 0 VIN = 0 6 8.5 7.5 7.5 12 9 pF pF pF MIN MAX UNIT
Notes : Test conditions TA = 25o C, f=1.0 MHz.
TEST SPECIFICATIONS
TEST CONDITION Output load Output load capacitance, CL (Including jig capacitance) Input rise and full times Input pulse levels Input timing measurement reference levels Output timing measurement reference levels 100 20 0.45-2.4 0.8 2.0 ALL SPEED OPTIONS 1TTL gate pF ns V V V UNIT
5.0V
2.7k Device Under Test CL IN3064 or Equivalent
6.2k
Diodes = IN3064 or Equivalent
Note : CL = 100pF including jig capacitance
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AC CHARACTERISTICS u Read Only Operations Characteristics
PARAMETER SYMBOLS JEDEC STANDARD tAVAV tAVQV tRC tACC Address to Output Delay /OE = VIL tELQV tGLQV tEHQZ tGHQZ tAXQX tCE tOE tDF tDF tQH /CE or /OE, Whichever Occurs First Chip Enable to Output Delay Chip Enable to Output Delay Chip Enable to Output High-Z Output Enable to Output High-Z Output Hold Time From Addresses, Min 0 /OE = VIL Max Max Max Max 55 30 18 18 Read Cycle Time /CE = VIL Max 55 Min
HMF8M32M8A
SPEED OPTIONS DESCRIPTION TEST SETUP -55 55 -70 70 70 70 40 20 20 0 -90 90 90 90 40 20 20 0 ns ns ns ns ns ns ns UNIT
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u Erase/Program Operations
PARAMETER SYMBOLS JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX tGHWL tELWL tWHEH tWLWH tWHWL STANDARD tWC tAS tAH tDS tDH tGHWL tCS tCH tWP tWPH tVCS Notes : 1. This does not include the preprogramming time 2. This timing is only for Sector Protect operations Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Read Recover Time Before Write /CE Setup Time /CE Hold Time Write Pulse Width Write Pulse Width High Vcc set up time Min Min Min Min Min Min Min Min Min Min Min 55 0 45 45 0 0 0 0 45 20 50 DESCRIPTION -55
HMF8M32M8A
-70
-90
UNIT
70 0 45 45 0 0 0 0 45 20 50
90 0 45 45 0 0 0 0 45 20 50
ns ns ns ns ns ns ns ns ns ns s
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u Erase/Program Operations Alternate /CE Controlled Writes
PARAMETER SYMBOLS DESCRIPTION JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX tGHWL tELWL tWHEH tWLWH tWHWL Notes : 1. This does not include the preprogramming time 2. This timing is only for Sector Protect operations STANDARD tWC tAS tAH tDS tDH tGHWL tCS tCH tWP tWPH Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Read Recover Time Before Write /CE Setup Time /CE Hold Time Write Pulse Width Write Pulse Width High Min Min Min Min Min Min Min Min Min Min 55 0 45 45 0 0 0 0 45 20 70 0 45 45 0 0 0 0 45 20 -55 -70
HMF8M32M8A
-90 90 0 45 45 0 0 0 0 45 20
UNIT ns ns ns ns ns ns ns ns ns ns
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u READ OPERATIONS TIMING
HMF8M32M8A
u RESET TIMING
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u PROGRAM OPERATIONS TIMING
HMF8M32M8A
u CHIP/SECTOR ERASE OPERATION TIMINGS
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u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
HMF8M32M8A
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
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u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
HMF8M32M8A
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
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PACKAGE DIMENSIONS
HMF8M32M8A
0.25 mm MAX
2.54 mm MIN Gold: 1.040.10 mm Solder: 0.9140.10 mm
-
1.27
1.270.08 mm
(Solder & Gold Plating)
ORDERING INFORMATION
Component Number 8EA 8EA 8EA
Part Number
Density
Org.
Package
Vcc
SPEED
HMF8M32M8A-55 HMF8M32M8A-70 HMF8M32M8A-90
32MByte 32MByte 32MByte
8MX 32bit 8MX 32bit 8MX 32bit
72 Pin-SIMM 72 Pin-SIMM 72 Pin-SIMM
5V 5V 5V
55ns 70ns 90ns
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